Translated Abstract
With the development of information technology, digital video as a sort of information carrier come into all fields of human life .With popularizing of IPTV, HD monitor and HDTV, both H.264 and AVS video coding standards are widely used. Intra prediction is the key technology of video compression. In order to use the main technologies of both H.264 and AVS effectively and improve hardware utilization ratio, a reusable intra prediction hardware decoder supporting both H.264 and AVS standards is proposed.Firstly, by comparing and analyzing the intra prediction algorithm of both H.264 and AVS standards, a reusable predictor is proposed. The predictor, which has 8 process elements including 32 adders，could compute 8 pixels’ prediction values at the same time. There are different operating modes that predictor has in different prediction modes. Secondly, in order to speed up the decoder, the plane mode decoding method is optimized and multi-stage pipeline is designed. Meanwhile, the two parallel sub-block level pipeline is completed by adjusting the sub-block decoding order. Finally, a multi-level reference pixels memory is proposed, which is used to reduce the RAM read and write operations.The RTL-level Verilog code of intra predictor is simulated on Modelsim platform, in which 142 cycles and 138 cycles are needed to decode a macroblock for H.264 and AVS respectively. Finally, the processor is synthesized in Altera EP2S90 FPGA. Totally 6474 ALUTs and 4096 bits memory in chip are resumed, which save the 41.1% resource comparing with separate predictor and achieves the goal of decoding HD video.
Corresponding authors email
